Hardware Security and Trust

CIPHER performs research in microelectronic applications, tools, architectures, and materials to enhance the security, trust, and reliability of microelectronic devices, hardware platforms, and the critical systems which rely upon them. CIPHER researchers develop tools and techniques in the areas of assurance, anti-tamper, and reliability for FPGAs, ASICs, System on a Chip, microcontrollers, and other devices, leveraging custom and formal methods. They further develop assured operations in enterprise, embedded, and cyber-physical systems via novel hardware-oriented security and trust protections and offer cutting-edge research and development in all aspects of configurable computing, such as analysis, emulation, and application of FPGAs using conventional and custom software EDA/CAD tools.

TMPO Publications

	C. R. Clark, W. Stuckey, N. Braswell, T. Haroldsen, T.-Y. Sung, and O. Shears Automated Formal Equivalency Checking for FPGA Tool GOMACTech 2023
	Efficient Porting of FPGA Independent Testing Within and Across Vendors T. Haroldsen, T.-Y. Sung, and O. Shears, J. Danner, D. Glick GOMACTech 2023
	Photonic Integrated Circuits: Assessment of State-of-the-Art Manufacturing Industrial Base Capabilities and Needs (PICASSO’S MUSICIANS) A. Stark, C. Bottenfield, B. M. Kanack, T. R. Harris, L. Sandstrom, B. Wier, H. Foster, B. Yang, T. Stievater, P. G. Goetz, J. Singley, J. Hawke GOMACTech 2023
	Monolithic Integration of RF and Digital Electronics with Photonics for a High-Bandwidth Coherent Driver Modulator J. Alward, C. Bottenfield, M. Caveney, C. Coen, C. Curry, Michael Grady, S. Hurst, P.K. Jo, J. Joseph, N. Lourenco, B. Lovelace, P. McMenamin, G.J. Samo, L. Sandstrom, B. Sayasean, N. Servies, C. Swanson, M. Tannenbaum, B. Wier, B.B. Yang, A. Zenere, A. Stark, J. Hawke GOMACTech, 2023
	FlowGNN: A Dataflow Architecture for Real-Time Workload-Agnostic Graph Neural Network Inference Rishov Sarkar, Stefan Abi-Karam, Yuqi He, Lakshmi Sathidevi, Cong Hao 2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA-29)
	Turn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Time-to-Digital Converters Bill Hunter, Colin Drewes, Christopher McCarty, Dustin Richmond, Ryan Kastner, Keegan Ryan 31^st ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (isFPGA 2023)
	Independent Functional Test for Microsemi FPGAs Jay Danner, Lee W. Lerner GOMACTech 2022
	Multicolor Ramsey numbers for Berge cycles Zachary DeStefano, Hannah Mahon, Frank Simutis, Michael Tait Electronic Journal of Combinatorics, 2021
	A S/C/X/Ku-band, 4-Tap, Digitally Controllable Analog FIR Filter with Reconfigurable Bandwidth and RF Filtering Profile Moon-Kyu Cho, Ickhyun Song, Nelson E. Lourenco, Adilson S. Cardoso, Christopher T. Coen, William B. Hunter, Douglas R. Denison, and John D. Cressler IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS 2021)
	Classifying Computations on Multi-Tenant FPGAs Mustafa Gobulukoglu, Colin Drewes, Bill Hunter, Dustin Richmond, Ryan Kastner 58th ACM/IEEE Design Automation Conference (DAC 2021)
	A Tunable Dual-Edge Time-to-Digital Converter C. Drewes, S. Harris, W. Wang, R. Appen, O. Weng, R. Kastner, W. Hunter, C. McCarty, and D. Richmond 29th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2021)
	Independent Testing of Untrusted FPGAs for Faulty Interconnect T. Haroldsen, M. French, T. Sung, D. Glick, J. Danner, and L. Lerner GOMACTech 2021
	Canary: An FPGA Assurance Plugin for Vendor EDA Tools D. Glick, J. Nifong, E. Ruiz, A. Schmidt, T. Haroldsen, J. Monson, and M. French GOMACTech 2021
	Memory-Loss Resilient Controller Design for Temporal Logic Constraints M. Abate, W. Stuckey, L. Lerner, E. Feron, S. Coogan Journal of Cyber-Physical Systems 2021
	Mapping Electromagnetic Fields in Active Electronic Devices via Novel Scanning Probe Techniques Kenton Brown and Lee W. Lerner 7^th Annual Hardware, Electronics & Advanced Technologies Symposium (HEAT 2020)
	Establishing Trust in Microelectronics Lee W. Lerner 28^th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (isFPGA 2020)
	Improved Techniques for Sensing Intra-Device Side Channel Leakage William Hunter, Christopher McCarty, and Lee W. Lerner 27th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2019)
	Are novel scanning-probe field sensors a tamper threat? True Merrill, Kenton Brown, Lee W. Lerner 2019 DoD Anti-Tamper Conference
	Formal Enforcement of Mission Assurance Properties in Cyber-Physical Systems Scott Harper, Jonathan Graf, Michael A. Capone, Justin Eng, Michael Farrell, and Lee W. Lerner IEEE National Aerospace and Defense Conference (NAECON 2017)
	Rapid Precedent-Aware Pedestrian and Car Classification on Constrained IoT Platforms Jay Danner, Linda Wills, Elbert M. Ruiz, and Lee W. Lerner 14^th ACM/IEEE Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia 2016)
	Multi-Modal Web-Based Dashboards for Geo-Located Real-Time Monitoring R. Michael Winters, Takahiko Tsuchiya, Lee W. Lerner, and Jason Freeman 2016 Web Audio Conference (WAC)
	The Trustworthy Autonomic Interface Guardian Architecture for Cyber-Physical Systems Kevin G. Lyn, Lee W. Lerner, Christopher J. McCarty, and Cameron D. Patterson 13th IEEE Conference on Dependable, Autonomic and Secure Computing (DASC 2015)
	Isolating Trust in an Industrial Control System-on-Chip Architecture Zane R. Franklin, Cameron D. Patterson, Lee W. Lerner, Ron J. Prado 7^th International Symposium on Resilient Control Systems (ISRCS 2014)

People

Laboratory Director, Cybersecurity, Information Protection, and Hardware Evaluation Research Laboratory